1. Field of the Invention
The present invention relates to an electrical characteristic measuring probe and a method of manufacturing the same and, more particularly, an electrical characteristic measuring probe used in measuring the electrical characteristics of a test object such as an LSI chip, or the like and a method of manufacturing the same.
2. Description of the Related Art
In the step of measuring electrical characteristics of the LSI, the electrical characteristic measuring probe is brought into contact with a plurality of electrode pads of the LSI chip to get electrical conduction between them.
As such electrical characteristic measuring probe, in Patent Literature 1 (Patent Application Publication 2001-255340), the inspection probe having the coil spring that makes it possible to set a total length of a contact probe short is set forth. Also, in Patent Literature 2 (Patent Application Publication Hei 7-7052), the electrical characteristic measuring probe having the configuration in which cantilever structural members are formed locally by processing the silicon substrate three-dimensionally, then a conducting metal film is formed thereon, and then the cantilever structural members are held by the insulating substrate having the wiring patterns thereon is set forth.
In addition, in Patent Literature 3 (Patent Application Publication 2002-168904), the contactor in which the probe supporting beams are arranged in zigzag on the substrate so as to fit in with a size reduction of the electrode pads of the LSI chip is set forth.
In recent years, a size reduction of the electrode pads of the LSI chip is being advanced with the higher performance of the semiconductor integrated circuit. For example, in the electrode pads arranged in the peripheral type, a pitch between the pads is reduced to 100 μm or less. Therefore, the electrical characteristic measuring probe that can be adapted for use with the electrode pads of the LSI chip in reduced size is desired earnestly.
The probes set forth in Patent Literatures 2 and 3 are considered to fit in with the size reduction of the electrode pads of the LSI chip, nevertheless the fine cantilever structures must be formed locally by processing the silicon substrate three-dimensionally. As a result, manufacturing steps becomes complicated and also it is possible to bring about an increase in production cost.
Also, as the electrode pads of the LSI chip, there is the full-matrix type in which the pads are arranged on the overall main surface of the LSI chip in addition to the peripheral type in which the pads are arranged in the periphery of the LSI chip. The probe set forth in Patent Literature 1 can be adapted for use with the full-matrix type electrode pads, but it is extremely difficult to adapt such probe for use with the electrode pads whose pitch is reduced to about 150 μm or less. Also, in Patent Literatures 2 and 3, the planar probe is constructed by processing the silicon substrate. Therefore, it is not easy to adapt such planar probe for use with the full-matrix type electrode pads formed at a very narrow pitch.